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CMNS-UNDERGRAD-NEWS  September 2018

CMNS-UNDERGRAD-NEWS September 2018

Subject:

Mpact Lecture: Stephen Trimberger

From:

Pamela Phetphongsy <[log in to unmask]>

Reply-To:

Daily eNews for CMNS Students <[log in to unmask]>

Date:

Mon, 17 Sep 2018 13:32:32 -0400

Content-Type:

text/plain

Parts/Attachments:

Parts/Attachments

text/plain (61 lines)

Subject: Mpact Lecture: Stephen Trimberger

Description:
Mpact Lecture Series: Stephen Trimberger
Thursday, October 4, 2018
2:30 p.m.-4:00 p.m.
Kim Engineering Building Rotunda
https://mpact.splashthat.com/

Please join us in welcoming Dr. Stephen Trimberger, Program Manager in the
Microelectronics Technology Office at DARPA and Visiting Research Engineer at
the Institute for Systems Research, who will present:

Three Ages of FPGAs: A Retrospective on the First Thirty Years of Field
Programmable Gate Array Technologies

Networking reception begins at 2:30 pm; lecture starts promptly at 3:00 pm.

Details and RSVP here: https://mpact.splashthat.com/

About the speaker:

Dr. Trimberger holds a Ph.D. degree from California Institute of Technology.
  From 1988 until 2017, he was employed at Xilinx, rising to the position of
Xilinx Fellow, heading the Circuits and Architectures Group in Xilinx
Research Labs. He was the technical leader for the XC4000 design automation
software, developed the Xilinx multi-context FPGA, led the architecture
definition group for the Xilinx XC4000X families, and designed the bitstream
security functions in the Xilinx Virtex and subsequent families of FPGAs. He
led the group that developed the first die-stacked 3D FPGA prototype at
Xilinx. He has served as Design Methods Chair for the Design Automation
Conference, Program Chair and General Chair for the ACM/SIGDA FPGA Symposium
and on the technical programs of numerous conferences and symposia. He has
authored five books and dozens of papers on design automation, FPGA
architectures and hardware security. He has more than 230 patents in IC
design, FPGA and ASIC architecture, CAE, and hardware security. His
innovations appear today in nearly all commercial FPGA devices. He is a
member of the United States National Academy of Engineering, a Fellow of the
ACM, Fellow of the IEEE, and recipient of the 2018 IEEE Don Pederson Award
for outstanding contributions to solid state circuits.

About the lecture:

Since their introduction, field programmable gate arrays (FPGAs) have grown
in capacity by more than a factor of 10,000 and in performance by a factor of
100. Cost and energy per operation have both decreased by more than a factor
of 1000. These advances have been fueled by process technology scaling, but
the FPGA story is much more complex than simple technology scaling.
Quantitative effects of Moore's Law have driven qualitative changes in FPGA
architecture, applications and tools. As a consequence, FPGAs have passed
through several distinct phases of development. These phases, termed
“Ages”  are: The Age of Invention, The Age of Expansion and The Age of
Accumulation.

Event Date: October 4, 2018
Event Start Time: 2:30 pm
Event End Time: 4:00 pm
Event Location: Kim Engineering Building Rotunda
Contact Person: Michelle Lane
Contact Email: [log in to unmask]
Website URL: https://mpact.splashthat.com/

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